1. Field of the Invention
The present invention relates to a method for fabricating a capacitor in a semiconductor device, and more particularly to a method for fabricating a capacitor which can prevent bridging of a storage node electrode by increasing bottom area of the storage node electrode and forming a prevention portion of the storage node on the bottom area.
2. Description of the Prior Art
As generally known in the art, a capacitor is an element that stores electric charges and supplies them to drive a semiconductor device, and it is generally known that size of unit cell has decreased and capacitance has increased to drive the semiconductor device by a little with the advance of high integration of the semiconductor device.
Although it has been necessary to minimize a capacitor with the advance of the high integration of a semiconductor device, limitations exist in storing electric charges, and it has been difficult to highly integrate the capacitors in comparison with the size of the cell. Accordingly, structure for storing electric charges of a capacitor has been variously studied to settle the above problems occurring in minimization of the capacitor.
Method of utilizing substance with a high dielectric ratio, method of decreasing thickness of a dielectric substance, and method of increasing surface area of a capacitor, which is a primarily utilized method in recent years, etc., have been adapted to increase electric charges of a capacitor.
Referring to structures of electric charge storing electrode in a capacitor, they can be largely divided into a stacking structure in which several layers are formed on small areas to obtain large area of a capacitor, a groove structure in which grooves of desired depth are formed on a substrate of a semiconductor and a capacitor is formed on them thereby storing the electric charges thereon.
Specifically, the stacking structure includes fin type structure that is formed in a fin shape, a cylindrical type structure that is formed in a cylinder shape, and a modified cavity type structure such as HSG (Hemispherical Shaped Grains) and Bellows, which is modified from a cavity type structure in order to increase capacitance of a capacitor.
However, when the method of utilizing substance of a big dielectric ratio in order to increase storing capacity of electric charges in DRAM device of a semiconductor, limitations arise as a result of such substances with large dielectric ratio not being diversified. Accordingly, the capacity of storing electric charges depends on the sort of a certain substance being chosen.
FIG. 1 is a cross-sectional view for showing a method for forming a capacitor of a semiconductor device according to a prior art.
First, as shown in FIG. 1, a polysilicon layer 5 and a hard-mask layer 10 are sequentially stacked on a semiconductor substrate (not shown) having a desired lower structure, and etching is selectively performed on these layers to form gates G1 and an insulation spacer 2 at both sides of the gates G1.
Subsequently, a first polysilicon layer is formed on the substrate inclusive of the gates G1, and this layer is planarized to form plugs 15 that fill spaces made between the gates G1.
Then, a first interlayer insulation layer 20 is formed on the resultant substrate inclusive of the gates G1, and selective etching of this layer is performed to form a first contact hole (not shown) that exposes the plug 15, and a storage node electrode 25 filling the first contact hole is formed.
Thereafter, a silicon nitride film 30 and a PSG (Phosphorous Silicate Glass) layer 32 are formed sequentially on the resultant substrate, and these layers are selectively etched till an upper surface of the storage node plug 25 is exposed thereby forming a second contact hole 34.
Then, a polysilicon layer (not shown) for a storage node electrode is formed in the second contact hole 34 and is etched back, then the deepening-out of the PSG layer is performed to obtain a cylindrical type storage node electrode 35 bridging the storage node plug 25.
FIG. 2 is a cross-sectional view of a process for showing problems occurring in the prior art.
However, as shown in FIG. 2, according to the above prior art, when the cylindrical type storage node electrode has been formed and a cleaning process of the electrode has been performed, the storage node electrode is tilted to an adjacent storage node electrode, resulting in bridging defects between the storage node electrodes.